Panel – OIF 448 Gbps Electrical Signaling for AI Progress & 224 Gbps Update for CEI On-going Developments

Description

Type

Panel Discussion

Speakers

Panelist

Director of Standards and Technology at Amphenol

Panelist

Principal Hardware Engineer at Cisco Systems, Inc.

Panelist

Principal System Architect at TE Connectivity

Categories

Primary Track

09. High-Speed Signal Processing, Modulation, Equalization & Coding/FEC

Secondary Track

07. Optimizing High-Speed Link Design

Education Level

All

Discipline

Artificial Intelligence
High-Speed Communications
Signal Integrity

Package Type

All-Access Package
Author
Exhibitor Pass
Expo Package
Media
Premium Education Package
Speaker
Standard Education Package