Bridging the Time-Frequency Chasm in PDN Design: Leveraging Cumulative Power-rail Noise & Reverse Pulse Techniques for Spatial-Frequency Insight
Type
Technical Paper Session
Handouts
Speakers
Speaker
Sr. Signal Integrity and Power Integrity Engineer at Amazon
Sr. Principal Application Engineer at Cadence
Application Engineer Architect at Cadence
Author
Principal Signal and Power Integrity Engineer at Samtec Inc.
Sr. Principal Hardware Engineer at Oracle Corporation
Retired
Advanced Packaging, Signal Integrity & Power Integrity, Senior Manager at Marvell
Categories
Primary Track
- 10. Power Integrity in Power Delivery Systems
Secondary Track
- 06. System Co-Design: Modeling, Simulation & Measurement Validation
Education Level
- Introductory
Discipline
- PCB Design
- Power Integrity
Badge Access
- All-Access
- Premium Education
- Standard Education
Best Paper Award Finalist
- Yes